Paper Title :Design an Novel Adaptive Built in Self Test [A.B.I.S.T] for Sram Memories
Author :Mounica.Poolla, S. Baba Fariddin, Veera Punnaiah Manda
Article Citation :Mounica.Poolla ,S. Baba Fariddin ,Veera Punnaiah Manda ,
(2017 ) " Design an Novel Adaptive Built in Self Test [A.B.I.S.T] for Sram Memories " ,
International Journal of Electrical, Electronics and Data Communication (IJEEDC) ,
pp. 50-53,
Volume-5,Issue-6
Abstract : Built-in self-test (BIST) is a design for testability technique in which a portion of a circuit on a chip, board, or
system is used to test the digital logic circuit itself. Testing of RAM modules is performed in both modules after
manufacturing and periodically in the field. During manufacturing, testing various kinds of tests are applied in order to
ensure that the RAM operates normally In order to test memories with the word width in a transparent way. Adaptive Builtin
Self Test schemes use the address latch to make the test of circuit in two ways by Columns and rows schemes utilized for
each RAM under test. The proposed schemes utilize an test in order to generate the test patterns and compress the responses
of the memory module; the word width of the memory can be smaller. As the row and column decoder match the memory
array cell address and it will catch the particular memory location using CAM(content address memory) technique. It gives
very fast operation than other because of CAM logic. The total addresses are contented in a cluster of memory is called
CAM. The total proposal is designed in tanner tools 13.0.
Type : Research paper
Published : Volume-5,Issue-6
DOIONLINE NO - IJEEDC-IRAJ-DOIONLINE-8326
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Published on 2017-08-26 |
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